Technischer Bericht: An X10 Compiler for Invasive Architectures

We study the compilation of X10 to novel, highly scalable hardware architectures in the scope of the InvasIC project. To this end, we describe the implementation of a machine code backend and its integration into the existing X10 compiler. In our implementation, the graph-based intermediate representation Firm is used. We identify several issues in the current compiler architecture related to the integration of a low-level backend. The issues and our solutions are independent of Firm and apply to all low-level intermedi- ate languages. Furthermore, we propose optimizations for certain X10 language constructs that are possible on invasive hardware architectures.